Make the program explicit.
Build headers, parsers, tables and actions in Python. Inspect the same serialized IR, with widths and names resolved.
Meet the authoring APIAn open research prototype
A small, architecture-free intermediate representation for P4. Author in Python. Explore what your packets actually do.
Executable semantics. Independent implementations.
Headers · parsers · actions · tables
A smaller place to reason
P4’s essential operations live in the core. Architectures and extern services connect through explicit contracts.
Build headers, parsers, tables and actions in Python. Inspect the same serialized IR, with widths and names resolved.
Meet the authoring APIRun the core under ordinary switch and filter adapters. Compare outputs and persistent extern state across independent interpreters.
Read the semanticsConnect core IR proofs with independent examples, P4 oracles and deliberate fault campaigns. Follow each claim to its evidence.
Explore the evidenceA complete Python eDSL program
A VLAN access gateway. Admit a packet by policy, remove its tag and remember the decision.
VLAN 42 · destination …:02
Scroll through the code. Follow the explanation, or choose a step.
"""A single-tag VLAN access gateway, built with the typed Python eDSL."""
from __future__ import annotations
from p4blo import edsl as p4
from p4blo.arch import assemble
from p4blo.arch import wire as arch_wire
from p4blo.arch.externs.declarations import Counter
from p4blo.arch.v0 import assembly_pb2 as apb
class Ethernet(p4.Header):
dst: p4.bit48
src: p4.bit48
ether_type: p4.bit16
class Vlan(p4.Header):
pcp: p4.bit3
dei: p4.bit1
vid: p4.bit12
ether_type: p4.bit16
class Headers(p4.Struct):
ethernet: Ethernet
vlan: Vlan
class Metadata(p4.Struct):
ingress_port: p4.bit9
egress_spec: p4.bit9
class Parse(p4.Parser[Headers, Metadata]):
@p4.state(start=True)
def start(self) -> p4.Transition:
self.extract(self.hdr.ethernet)
return self.select(
self.hdr.ethernet.ether_type,
{0x8100: self.tagged},
default=self.accept,
)
@p4.state
def tagged(self) -> p4.Transition:
self.extract(self.hdr.vlan)
return self.accept
admissions = Counter("admissions", size=512)
class Gateway(p4.Control[Headers, Metadata]):
@p4.action
def deny(self) -> None:
self.assign(self.meta.egress_spec, 511)
@p4.action
def deliver(self, port: p4.bit9) -> None:
self.assign(self.meta.egress_spec, port)
self.assign(self.hdr.ethernet.ether_type, self.hdr.vlan.ether_type)
self.set_invalid(self.hdr.vlan)
admissions.count(port.cast(p4.bit32))
access = p4.Table(
keys=(
p4.exact(Metadata.ingress_port),
p4.exact(Headers.vlan.vid),
p4.exact(Headers.ethernet.dst),
),
actions=[deliver, deny],
default=deny(),
size=1024,
)
def apply(self) -> None:
self.assign(self.meta.egress_spec, 511)
vlan = self.hdr.vlan
with self.if_(
vlan.is_valid()
& (vlan.vid > 0)
& (vlan.vid < 4095)
& (vlan.ether_type != 0x8100)
& (vlan.ether_type != 0x88A8)
):
self.apply_table(self.access)
class Emit(p4.Deparser[Headers]):
def apply(self) -> None:
self.emit(self.hdr.ethernet)
self.emit(self.hdr.vlan)
def build() -> apb.BlockAssembly:
return assemble(
p4.BlockLibrary(Parse, Gateway, Emit, externs=[admissions]),
name="vlan_gateway",
headers=Headers,
metadata=Metadata,
exports={"parser": Parse, "ingress": Gateway, "deparser": Emit},
)
if __name__ == "__main__":
print(arch_wire.dump_text(build()), end="")
From the runnable demo
One installed rule admits VLAN 42. VLAN 43 misses. The next admitted packet sees the previous count.
Run it and inspect the tests$ nix develop -c uv run python -m tests.programs.corpus.vlan_gateway.demo
count 1count 1count 2Admitted packets: 38 → 34 bytes. Payload preserved.
A single-tag gateway with a trusted host policy, not a complete VLAN switch. The walkthrough presents tested source; it doesn’t execute Python in your browser. Read its exact boundary ↗
Evidence you can inspect
The core IR combines tested conformance with selected Lean proofs. Each kind of evidence has a stated boundary.
Read the release evidencePython and Lean comparisons check packets, errors and persistent state against independent expectations.
Core IR validity, execution and codec properties, with their exact premises available to read.
Intentional faults challenge implementations and observers. Retained inputs make the findings reproducible.
An educational research prototype. Universal Python correctness, full P4 support and complete pipeline proofs remain outside the current claims. Read the supported profile
Start with a packet
Build and run Python examples against the core IR.
The quickstart introduces authoring and independent execution checks.